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<p>Reset and Clock Control.  
</p>

<p><code>#include &lt;<a class="el" href="stm32f4xx_8h_source.html">stm32f4xx.h</a>&gt;</code></p>
<table class="memberdecls">
<tr><td colspan="2"><h2><a name="pub-attribs"></a>
Data Fields</h2></td></tr>
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<hr/><h2>Field Documentation</h2>
<a class="anchor" id="a1e9c75b06c99d0611535f38c7b4aa845"></a><!-- doxytag: member="RCC_TypeDef::AHB1ENR" ref="a1e9c75b06c99d0611535f38c7b4aa845" args="" -->
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<p>RCC AHB1 peripheral clock register, Address offset: 0x30 </p>

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<p>RCC AHB1 peripheral clock enable in low power mode register, Address offset: 0x50 </p>

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<p>RCC AHB1 peripheral reset register, Address offset: 0x10 </p>

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<p>RCC AHB2 peripheral clock register, Address offset: 0x34 </p>

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<p>RCC AHB2 peripheral clock enable in low power mode register, Address offset: 0x54 </p>

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<p>RCC AHB2 peripheral reset register, Address offset: 0x14 </p>

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<p>RCC AHB3 peripheral clock register, Address offset: 0x38 </p>

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<a class="anchor" id="a2ff82b9bf0231645108965aa0febd766"></a><!-- doxytag: member="RCC_TypeDef::AHB3LPENR" ref="a2ff82b9bf0231645108965aa0febd766" args="" -->
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<p>RCC AHB3 peripheral clock enable in low power mode register, Address offset: 0x58 </p>

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<a class="anchor" id="a28560c5bfeb45326ea7f2019dba57bea"></a><!-- doxytag: member="RCC_TypeDef::AHB3RSTR" ref="a28560c5bfeb45326ea7f2019dba57bea" args="" -->
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<p>RCC AHB3 peripheral reset register, Address offset: 0x18 </p>

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<p>RCC APB1 peripheral clock enable register, Address offset: 0x40 </p>

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<p>RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60 </p>

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<p>RCC APB1 peripheral reset register, Address offset: 0x20 </p>

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<p>RCC APB2 peripheral clock enable register, Address offset: 0x44 </p>

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<p>RCC APB2 peripheral clock enable in low power mode register, Address offset: 0x64 </p>

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<p>RCC APB2 peripheral reset register, Address offset: 0x24 </p>

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<p>RCC Backup domain control register, Address offset: 0x70 </p>

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<p>RCC clock configuration register, Address offset: 0x08 </p>

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<p>RCC clock interrupt register, Address offset: 0x0C </p>

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          <td class="memname">__IO uint32_t <a class="el" href="struct_r_c_c___type_def.html#ab40c89c59391aaa9d9a8ec011dd0907a">CR</a></td>
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<p>RCC clock control register, Address offset: 0x00 </p>

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<a class="anchor" id="a876dd0a8546697065f406b7543e27af2"></a><!-- doxytag: member="RCC_TypeDef::CSR" ref="a876dd0a8546697065f406b7543e27af2" args="" -->
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          <td class="memname">__IO uint32_t <a class="el" href="struct_r_c_c___type_def.html#a876dd0a8546697065f406b7543e27af2">CSR</a></td>
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<p>RCC clock control &amp; status register, Address offset: 0x74 </p>

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<a class="anchor" id="ae6ff257862eba6b4b367feea786bf1fd"></a><!-- doxytag: member="RCC_TypeDef::PLLCFGR" ref="ae6ff257862eba6b4b367feea786bf1fd" args="" -->
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          <td class="memname">__IO uint32_t <a class="el" href="struct_r_c_c___type_def.html#ae6ff257862eba6b4b367feea786bf1fd">PLLCFGR</a></td>
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<p>RCC PLL configuration register, Address offset: 0x04 </p>

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<a class="anchor" id="a2d08d5f995ed77228eb56741184a1bb6"></a><!-- doxytag: member="RCC_TypeDef::PLLI2SCFGR" ref="a2d08d5f995ed77228eb56741184a1bb6" args="" -->
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          <td class="memname">__IO uint32_t <a class="el" href="struct_r_c_c___type_def.html#a2d08d5f995ed77228eb56741184a1bb6">PLLI2SCFGR</a></td>
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<p>RCC PLLI2S configuration register, Address offset: 0x84 </p>

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<a class="anchor" id="af86c61a5d38a4fc9cef942a12744486b"></a><!-- doxytag: member="RCC_TypeDef::RESERVED0" ref="af86c61a5d38a4fc9cef942a12744486b" args="" -->
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          <td class="memname">uint32_t <a class="el" href="struct_r_c_c___type_def.html#af86c61a5d38a4fc9cef942a12744486b">RESERVED0</a></td>
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<p>Reserved, 0x1C </p>

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<a class="anchor" id="a28d88d9a08aab1adbebea61c42ef901e"></a><!-- doxytag: member="RCC_TypeDef::RESERVED1" ref="a28d88d9a08aab1adbebea61c42ef901e" args="[2]" -->
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          <td class="memname">uint32_t <a class="el" href="struct_r_c_c___type_def.html#a28d88d9a08aab1adbebea61c42ef901e">RESERVED1</a>[2]</td>
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<p>Reserved, 0x28-0x2C </p>

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<a class="anchor" id="a4c9b972a304c0e08ca27cbe57627c496"></a><!-- doxytag: member="RCC_TypeDef::RESERVED2" ref="a4c9b972a304c0e08ca27cbe57627c496" args="" -->
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          <td class="memname">uint32_t <a class="el" href="struct_r_c_c___type_def.html#a4c9b972a304c0e08ca27cbe57627c496">RESERVED2</a></td>
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<div class="memdoc">
<p>Reserved, 0x3C </p>

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<a class="anchor" id="ab6f0f833dbe064708de75d95c68c32fd"></a><!-- doxytag: member="RCC_TypeDef::RESERVED3" ref="ab6f0f833dbe064708de75d95c68c32fd" args="[2]" -->
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          <td class="memname">uint32_t <a class="el" href="struct_r_c_c___type_def.html#ab6f0f833dbe064708de75d95c68c32fd">RESERVED3</a>[2]</td>
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<p>Reserved, 0x48-0x4C </p>

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<a class="anchor" id="ac0018930ee9f18afda25b695b9a4ec16"></a><!-- doxytag: member="RCC_TypeDef::RESERVED4" ref="ac0018930ee9f18afda25b695b9a4ec16" args="" -->
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          <td class="memname">uint32_t <a class="el" href="struct_r_c_c___type_def.html#ac0018930ee9f18afda25b695b9a4ec16">RESERVED4</a></td>
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<p>Reserved, 0x5C </p>

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<a class="anchor" id="ac0eb05794aeee3b4ed69c8fe54c9be3b"></a><!-- doxytag: member="RCC_TypeDef::RESERVED5" ref="ac0eb05794aeee3b4ed69c8fe54c9be3b" args="[2]" -->
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          <td class="memname">uint32_t <a class="el" href="struct_r_c_c___type_def.html#ac0eb05794aeee3b4ed69c8fe54c9be3b">RESERVED5</a>[2]</td>
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<p>Reserved, 0x68-0x6C </p>

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<a class="anchor" id="a10da398d74a1f88d5b42bd40718d9447"></a><!-- doxytag: member="RCC_TypeDef::RESERVED6" ref="a10da398d74a1f88d5b42bd40718d9447" args="[2]" -->
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          <td class="memname">uint32_t <a class="el" href="struct_r_c_c___type_def.html#a10da398d74a1f88d5b42bd40718d9447">RESERVED6</a>[2]</td>
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<p>Reserved, 0x78-0x7C </p>

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<a class="anchor" id="aaef3da59eaf7c6dfdf9a12fd60ce58a8"></a><!-- doxytag: member="RCC_TypeDef::SSCGR" ref="aaef3da59eaf7c6dfdf9a12fd60ce58a8" args="" -->
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          <td class="memname">__IO uint32_t <a class="el" href="struct_r_c_c___type_def.html#aaef3da59eaf7c6dfdf9a12fd60ce58a8">SSCGR</a></td>
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<p>RCC spread spectrum clock generation register, Address offset: 0x80 </p>

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<hr/>The documentation for this struct was generated from the following file:<ul>
<li>D:/123/stm32f4_blink_led-1.2.2-120323/inc/<a class="el" href="stm32f4xx_8h_source.html">stm32f4xx.h</a></li>
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